The chip on film (COF) is a device formed by fixing an integrated circuit (IC) to a flexible circuit board. Such device may be used in many display devices such as LCD and OLED displays. It is usually used as a source driver and a gate driver of a display driver. In a driver circuit, one end of the COF is connected to a printed circuit board (PCB) and for receiving data signals transmitted by the PCB, and the other end of the COF is connected to a display panel for transmitting the data signals outputted by a IC in the PCB to the display panel, so as to drive the display panel for displaying.
Connecting the PCB with the display panel by the COF is generally carried out by a bonding process. The bonding process is mainly composed of a TCP bonding and a PCB bonding. The TCP bonding is to connect the COF to the display panel through pre-lamination and lamination, so that the output pads of the COF and the input pads of the display panel are pressed together. The output pads of the COF and the input pads of the display panel can be electrically connected via an anisotropic conductive film (ACF). The PCB bonding is to bond the other end of the COF to the PCB.
During the bonding process, firstly alignment and then lamination are performed. Upon lamination, there are strict requirements on the temperature, time and pressure for lamination. Imprecise alignment or unsuitable lamination conditions would lead to poor bonding. In order to detect the poor bonding, conventional methods include making judgment by powering up the display panel and performing test by means of test points. For examples, as shown in FIG. 1, a test pad 131 is respectively arranged at two sides of a chip on film 13. The test pad 131 is electrically connected to a display panel 12, and is connected to a test point 111 on a printed circuit board 11 via a test lead wire 132. As shown in FIG. 1, if there is an electrically conductive path between two test points 111 on the printed circuit board 11 which are connected via the test lead wire 132, it indicates that the bonding at the test pad 131 is good. However, such method is only able to detect whether the bonding at two sides of the bonding area for the display panel and the chip on film is good, but unable to detect occurrence of large-area poor bonding in the middle portion of the bonding area.
In conclusion, for an existing display device, it is only possible to determine bonding conditions at side positions of the bonding area after the chip on film and the display panel are laminated, while bonding conditions at other positions of the bonding area can not be detected.